-- generated by newgenasym Thu Dec 17 16:03:38 2009

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity SKT_2X30_VT_ITP_XDP_SINAI_KOZ is
    port (    
	BCLK_0:    INOUT  STD_LOGIC;    
	BCLK_1:    INOUT  STD_LOGIC;    
	BPM0_0_N:  INOUT  STD_LOGIC;    
	BPM0_1_N:  INOUT  STD_LOGIC;    
	BPM0_2_N:  INOUT  STD_LOGIC;    
	BPM0_3_N:  INOUT  STD_LOGIC;    
	BPM0_4_N:  INOUT  STD_LOGIC;    
	BPM0_5_N:  INOUT  STD_LOGIC;    
	BPM1_0_N:  INOUT  STD_LOGIC;    
	BPM1_1_N:  INOUT  STD_LOGIC;    
	BPM1_2_N:  INOUT  STD_LOGIC;    
	BPM1_3_N:  INOUT  STD_LOGIC;    
	BPM1_4_N:  INOUT  STD_LOGIC;    
	BPM1_5_N:  INOUT  STD_LOGIC;    
	DEBUG_0:   INOUT  STD_LOGIC;    
	DEBUG_1:   INOUT  STD_LOGIC;    
	DEBUG_2:   INOUT  STD_LOGIC;    
	DEBUG_3:   INOUT  STD_LOGIC;    
	DEBUG_4:   INOUT  STD_LOGIC;    
	DEBUG_5:   INOUT  STD_LOGIC;    
	DEBUG_6:   INOUT  STD_LOGIC;    
	DEBUG_7:   INOUT  STD_LOGIC;    
	GND1:      INOUT  STD_LOGIC;    
	GND10:     INOUT  STD_LOGIC;    
	GND11:     INOUT  STD_LOGIC;    
	GND12:     INOUT  STD_LOGIC;    
	GND13:     INOUT  STD_LOGIC;    
	GND14:     INOUT  STD_LOGIC;    
	GND15:     INOUT  STD_LOGIC;    
	GND16:     INOUT  STD_LOGIC;    
	GND17:     INOUT  STD_LOGIC;    
	GND18:     INOUT  STD_LOGIC;    
	GND2:      INOUT  STD_LOGIC;    
	GND3:      INOUT  STD_LOGIC;    
	GND4:      INOUT  STD_LOGIC;    
	GND5:      INOUT  STD_LOGIC;    
	GND6:      INOUT  STD_LOGIC;    
	GND7:      INOUT  STD_LOGIC;    
	GND8:      INOUT  STD_LOGIC;    
	GND9:      INOUT  STD_LOGIC;    
	MCHGPE_N:  INOUT  STD_LOGIC;    
	MCHPME_N:  INOUT  STD_LOGIC;    
	N_C1:      INOUT  STD_LOGIC;    
	N_C2:      INOUT  STD_LOGIC;    
	N_C3:      INOUT  STD_LOGIC;    
	N_C4:      INOUT  STD_LOGIC;    
	N_C5:      INOUT  STD_LOGIC;    
	N_C6:      INOUT  STD_LOGIC;    
	N_C7:      INOUT  STD_LOGIC;    
	PROC_VTT:  INOUT  STD_LOGIC;    
	PWRGOOD:   INOUT  STD_LOGIC;    
	RESET_N:   INOUT  STD_LOGIC;    
	RESETIN_N: INOUT  STD_LOGIC;    
	TCK0:      INOUT  STD_LOGIC;    
	TCK1:      INOUT  STD_LOGIC;    
	TDI:       INOUT  STD_LOGIC;    
	TDO:       INOUT  STD_LOGIC;    
	TMS:       INOUT  STD_LOGIC;    
	TRST_N:    INOUT  STD_LOGIC;    
	VCC1_5:    INOUT  STD_LOGIC);
end SKT_2X30_VT_ITP_XDP_SINAI_KOZ;
