-- generated by newgenasym Mon Jul 07 12:30:47 2008

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity ISL90728 is
    port (    
	GND:       INOUT  STD_LOGIC;    
	RH:        INOUT  STD_LOGIC;    
	RW:        INOUT  STD_LOGIC;    
	SCL:       IN     STD_LOGIC;    
	SDA:       INOUT  STD_LOGIC;    
	VDD:       IN     STD_LOGIC);
end ISL90728;
