// generated by newgenasym  Tue Sep 18 12:53:38 2007


module conn240_ddr3_dimm (a, a16_ba2, ba, cas_n, cb, ck0n, ck0p, cke, cs, dq, dqs0n,
        dqs0p, dqs10n_nc, dqs10p_dm1, dqs11n_nc, dqs11p_dm2,
        dqs12n_nc, dqs12p_dm3, dqs13n_nc, dqs13p_dm4, dqs14n_nc,
        dqs14p_dm5, dqs15n_nc, dqs15p_dm6, dqs16n_nc, dqs16p_dm7,
        dqs17n_nc, dqs17p_dm8, dqs1n, dqs1p, dqs2n, dqs2p, dqs3n,
        dqs3p, dqs4n, dqs4p, dqs5n, dqs5p, dqs6n, dqs6p, dqs7n, dqs7p,
        dqs8n, dqs8p, dqs9n_nc, dqs9p_dm0, err_out_nc, event_n_nc,
        nc_ck1n, nc_ck1p, nc_test, odt, par_in_nc, ras_n, reset_n,
        sa, scl, sda, vdd_170, vdd_173, vdd_176, vdd_179, vdd_182,
        vdd_183, vdd_186, vdd_189, vdd_191, vdd_194, vdd_197,
        vdd_51, vdd_54, vdd_57, vdd_60, vdd_62, vdd_65, vdd_66,
        vdd_69, vdd_72, vdd_75, vdd_78, vddspd, vrefca, vrefdq,
        vss_101, vss_104, vss_107, vss_11, vss_110, vss_113,
        vss_116, vss_121, vss_124, vss_127, vss_130, vss_133,
        vss_136, vss_139, vss_14, vss_142, vss_145, vss_148,
        vss_151, vss_154, vss_157, vss_160, vss_163, vss_166,
        vss_17, vss_199, vss_2, vss_20, vss_202, vss_205, vss_208,
        vss_211, vss_214, vss_217, vss_220, vss_223, vss_226,
        vss_229, vss_23, vss_232, vss_235, vss_239, vss_26, vss_29,
        vss_32, vss_35, vss_38, vss_41, vss_44, vss_47, vss_5, vss_8,
        vss_80, vss_83, vss_86, vss_89, vss_92, vss_95, vss_98,
        vtt_120, vtt_240, vtt_48, vtt_49, we_n);
    inout [15:0] a;
    inout a16_ba2;
    inout [1:0] ba;
    inout cas_n;
    inout [7:0] cb;
    inout ck0n;
    inout ck0p;
    inout [1:0] cke;
    inout [3:0] cs;
    inout [63:0] dq;
    inout dqs0n;
    inout dqs0p;
    inout dqs10n_nc;
    inout dqs10p_dm1;
    inout dqs11n_nc;
    inout dqs11p_dm2;
    inout dqs12n_nc;
    inout dqs12p_dm3;
    inout dqs13n_nc;
    inout dqs13p_dm4;
    inout dqs14n_nc;
    inout dqs14p_dm5;
    inout dqs15n_nc;
    inout dqs15p_dm6;
    inout dqs16n_nc;
    inout dqs16p_dm7;
    inout dqs17n_nc;
    inout dqs17p_dm8;
    inout dqs1n;
    inout dqs1p;
    inout dqs2n;
    inout dqs2p;
    inout dqs3n;
    inout dqs3p;
    inout dqs4n;
    inout dqs4p;
    inout dqs5n;
    inout dqs5p;
    inout dqs6n;
    inout dqs6p;
    inout dqs7n;
    inout dqs7p;
    inout dqs8n;
    inout dqs8p;
    inout dqs9n_nc;
    inout dqs9p_dm0;
    inout err_out_nc;
    inout event_n_nc;
    inout nc_ck1n;
    inout nc_ck1p;
    inout nc_test;
    inout [1:0] odt;
    inout par_in_nc;
    inout ras_n;
    inout reset_n;
    inout [2:0] sa;
    inout scl;
    inout sda;
    inout vdd_170;
    inout vdd_173;
    inout vdd_176;
    inout vdd_179;
    inout vdd_182;
    inout vdd_183;
    inout vdd_186;
    inout vdd_189;
    inout vdd_191;
    inout vdd_194;
    inout vdd_197;
    inout vdd_51;
    inout vdd_54;
    inout vdd_57;
    inout vdd_60;
    inout vdd_62;
    inout vdd_65;
    inout vdd_66;
    inout vdd_69;
    inout vdd_72;
    inout vdd_75;
    inout vdd_78;
    inout vddspd;
    inout vrefca;
    inout vrefdq;
    inout vss_101;
    inout vss_104;
    inout vss_107;
    inout vss_11;
    inout vss_110;
    inout vss_113;
    inout vss_116;
    inout vss_121;
    inout vss_124;
    inout vss_127;
    inout vss_130;
    inout vss_133;
    inout vss_136;
    inout vss_139;
    inout vss_14;
    inout vss_142;
    inout vss_145;
    inout vss_148;
    inout vss_151;
    inout vss_154;
    inout vss_157;
    inout vss_160;
    inout vss_163;
    inout vss_166;
    inout vss_17;
    inout vss_199;
    inout vss_2;
    inout vss_20;
    inout vss_202;
    inout vss_205;
    inout vss_208;
    inout vss_211;
    inout vss_214;
    inout vss_217;
    inout vss_220;
    inout vss_223;
    inout vss_226;
    inout vss_229;
    inout vss_23;
    inout vss_232;
    inout vss_235;
    inout vss_239;
    inout vss_26;
    inout vss_29;
    inout vss_32;
    inout vss_35;
    inout vss_38;
    inout vss_41;
    inout vss_44;
    inout vss_47;
    inout vss_5;
    inout vss_8;
    inout vss_80;
    inout vss_83;
    inout vss_86;
    inout vss_89;
    inout vss_92;
    inout vss_95;
    inout vss_98;
    inout vtt_120;
    inout vtt_240;
    inout vtt_48;
    inout vtt_49;
    inout we_n;


    initial
        begin
        end

endmodule
