// generated by newgenasym  Wed Jan 05 17:34:20 2005


module gtl2005 (a0, a1, a2, a3, b0, b1, b2, b3, dir, gnd1, gnd2, gnd3, gtlref,
        vcc);
    input a0;
    input a1;
    input a2;
    input a3;
    output b0;
    output b1;
    output b2;
    output b3;
    input dir;
    input gnd1;
    input gnd2;
    input gnd3;
    input gtlref;
    input vcc;


    initial
        begin
        end

endmodule
