-- generated by newgenasym Tue Feb 08 18:12:02 2005

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity \2x2hdr_pwr\ is
    port (    
	IO1:       INOUT  STD_LOGIC;    
	IO2:       INOUT  STD_LOGIC;    
	IO3:       INOUT  STD_LOGIC;    
	IO4:       INOUT  STD_LOGIC);
end \2x2hdr_pwr\;
