// generated by newgenasym  Tue Aug 12 12:34:22 2008


module dsub9x2_ra (gnd1, gnd2, gnd3, gnd4, io);
    inout gnd1;
    inout gnd2;
    inout gnd3;
    inout gnd4;
    inout [18:1] io;


    initial
        begin
        end

endmodule
