-- generated by newgenasym Tue Oct 28 16:14:14 2008

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity ISL62871 is
    port (    
	BOOT:      INOUT  STD_LOGIC;    
	EN:        IN     STD_LOGIC;    
	FB:        INOUT  STD_LOGIC;    
	GND:       IN     STD_LOGIC;    
	LGATE:     INOUT  STD_LOGIC;    
	OCSET:     INOUT  STD_LOGIC;    
	PGND:      IN     STD_LOGIC;    
	PGOOD:     OUT    STD_LOGIC;    
	PHASE:     INOUT  STD_LOGIC;    
	PVCC:      IN     STD_LOGIC;    
	SET0:      INOUT  STD_LOGIC;    
	SREF:      INOUT  STD_LOGIC;    
	UGATE:     INOUT  STD_LOGIC;    
	VCC:       IN     STD_LOGIC;    
	VID0:      IN     STD_LOGIC;    
	VO:        INOUT  STD_LOGIC);
end ISL62871;
