-- generated by newgenasym Tue May 23 11:14:47 2006

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity BATT_HLDR_3P_KIT is
    port (    
	N:         INOUT  STD_LOGIC;    
	P1:        INOUT  STD_LOGIC;    
	P2:        INOUT  STD_LOGIC);
end BATT_HLDR_3P_KIT;
