;;@file
;
; @copyright
;  INTEL CONFIDENTIAL
;  Copyright 2013 - 2016 Intel Corporation.
;
;  The source code contained or described herein and all documents related to the
;  source code ("Material") are owned by Intel Corporation or its suppliers or
;  licensors. Title to the Material remains with Intel Corporation or its suppliers
;  and licensors. The Material may contain trade secrets and proprietary and
;  confidential information of Intel Corporation and its suppliers and licensors,
;  and is protected by worldwide copyright and trade secret laws and treaty
;  provisions. No part of the Material may be used, copied, reproduced, modified,
;  published, uploaded, posted, transmitted, distributed, or disclosed in any way
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;
;  No license under any patent, copyright, trade secret or other intellectual
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;
;  This file contains an 'Intel Peripheral Driver' and is uniquely identified as
;  "Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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;
;@par Specification
;;
;**************************************************************************
;*                                                                        *
;*  PURPOSE:                                                              *
;*                                                                        *
;*      This file contains sample code to initialize processor cache      *
;*      and pass control to the Memory Reference Code                     *
;*                                                                        *
;**************************************************************************
IFNDEF EFI_MEMORY_INIT
  
.586P


.MODEL flat, SYSCALL
.CODE
;_TEXT32 SEGMENT PARA USE32 PUBLIC 'CODE32'

  PUBLIC _MrcEntryPoint_FAR
  extern @ConfigureMemory@4:      NEAR

; Single MRC entry point
_MrcEntryPoint_FAR PROC FAR PUBLIC
  push  ecx                 ; save *MrcData
  call  @ConfigureMemory@4  ; __fastcall calling convention means initial parameter pointer is in ecx
  pop   ecx
  retf  
_MrcEntryPoint_FAR ENDP

ENDIF

END

